1 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com hi-reliability product ws128k32-xxx / EDI8C32128C 128kx32 sram module, smd 5962-93187 & 5962-95595 n commercial, industrial and military temperature ranges n 5 volt power supply n low power cmos n ttl compatible inputs and outputs n built in decoupling caps and multiple ground pins for low noise operation n weight: ws128k32-xg2tx / EDI8C32128C-e - 8 grams typical ws128k32-xh1x / EDI8C32128C-g - 13 grams typical ws128k32-xg4tx - 20 grams typical n all devices are upgradeable to 512kx32 features n access times of 15, 17, 20, 25, 35, 45, 55ns n mil-std-883 compliant devices available n packaging 66 pin, pga type, 1.075" square, hermetic ceramic hip (package 400) 68 lead, 40mm low profile cqfp, 3.56mm (0.140") (package 502), package to be developed. 68 lead, 22.4mm low profile cqfp, 4.57mm (0.180"), (package 509) n organized as 128kx32; user configurable as 256kx16 or 512kx8 n low power data retention - only available in g2t/e package type pin description i/o 0-31 data inputs/outputs a 0-16 address inputs we 1-4 write enables cs 1-4 chip selects oe output enable v cc power supply gnd ground nc not connected i/o 8 i/o 9 i/o 10 a 13 a 14 a 15 a 16 nc i/o 0 i/o 1 i/o 2 we 2 cs 2 gnd i/o 11 a 10 a 11 a 12 v cc cs 1 nc i/o 3 i/o 15 i/o 14 i/o 13 i/o 12 oe nc we 1 i/o 7 i/o 6 i/o 5 i/o 4 i/o 24 i/o 25 i/o 26 a 6 a 7 nc a 8 a 9 i/o 16 i/o 17 i/o 18 v cc cs 4 we 4 i/o 27 a 3 a 4 a 5 we 3 cs 3 gnd i/o 19 i/o 31 i/o 30 i/o 29 i/o 28 a 0 a 1 a 2 i/o 23 i/o 22 i/o 21 i/o 20 11 22 33 44 55 66 1 12 23 34 45 56 top view block diagram 128k x 8 8 i/o 0-7 cs 1 128k x 8 8 i/o 8-15 2 128k x 8 8 i/o 16-23 3 128k x 8 8 i/o 24-31 4 a 0-16 oe we cs we cs we cs we 1234 fig. 1 pin configuration for ws128k32n-xh1x and EDI8C32128C-g august 1999 rev. 4 note: for non-smd new designs, please use the ws128k32- xxx part number for inquiries and orders.
2 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com 128k x 8 8 i/o 0-7 cs 1 128k x 8 8 i/o 8-15 2 128k x 8 8 i/o 16-23 3 128k x 8 8 i/o 24-31 4 a 0-16 oe we cs we cs we cs we 1234 block diagram fig. 2 pin configuration for ws128k32-xg4tx fig. 3 pin configuration for ws128k32-xg2tx and EDI8C32128C-e 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 v cc a 11 a 12 a 13 a 14 a 15 a 16 cs 2 oe cs 4 nc nc nc nc nc nc nc i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 nc a 0 a 1 a 2 a 3 a 4 a 5 cs 1 gnd cs 3 we a 6 a 7 a 8 a 9 a 10 v cc 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 v cc a 11 a 12 a 13 a 14 a 15 a 16 cs 1 oe cs 2 nc we 2 we 3 we 4 nc nc nc i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 nc a 0 a 1 a 2 a 3 a 4 a 5 cs 3 gnd cs 4 we 1 a 6 a 7 a 8 a 9 a 10 v cc top view top view the white 68 lead g2t cqfp fills the same fit and function as the jedec 68 lead cqfj or 68 plcc. but the g2t has the tce and lead inspection advantage of the cqfp form. 0.940" 128k x 8 8 i/o 0-7 cs 1 128k x 8 8 i/o 8-15 cs 2 128k x 8 8 i/o 16-23 cs 3 128k x 8 8 i/o 24-31 cs 4 a 0 - 16 oe we block diagram pin description i/o 0-31 data inputs/outputs a 0-16 address inputs we write enables cs 1-4 chip selects oe output enable v cc power supply gnd ground nc not connected pin description i/o 0-31 data inputs/outputs a 0-16 address inputs we 1-4 write enables cs 1-4 chip selects oe output enable v cc power supply gnd ground nc not connected ws128k32-xxx / EDI8C32128C
3 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com capacitance (t a = +25 c) parameter symbol conditions max unit oe capacitance c oe v in = 0 v, f = 1.0 mhz 50 pf we 1-4 capacitance c we v in = 0 v, f = 1.0 mhz pf hip (pga) h1/g 20 cqfp g4 50 cqfp g2t/e 20 cs 1-4 capacitance c cs v in = 0 v, f = 1.0 mhz 20 pf data i/o capacitance c i/o v i/o = 0 v, f = 1.0 mhz 20 pf address input capacitance c ad v in = 0 v, f = 1.0 mhz 50 pf this parameter is guaranteed by design but not tested. truth table absolute maximum ratings parameter symbol min max unit operating temperature t a -55 +125 c storage temperature t stg -65 +150 c signal voltage relative to gnd v g -0.5 vcc+0.5 v junction temperature t j 150 c supply voltage v cc -0.5 7.0 v cs oe we mode data i/o power h x x standby high z standby l l h read data out active l x l write data in active l h h out disable high z active recommended operating conditions parameter symbol min max unit supply voltage v cc 4.5 5.5 v input high voltage v ih 2.2 v cc + 0.3 v input low voltage v il -0.3 +0.8 v operating temp. (mil.) t a -55 +125 c dc characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) parameter sym conditions -15 -17 -20 -25 units min max min max min max min max input leakage current i li v cc = 5.5, v in = gnd to v cc 10 10 10 10 m a output leakage current i lo cs = v ih , oe = v ih , v out = gnd to v cc 10 10 10 10 m a operating supply current i cc cs = v il , oe = v ih , f = 5mhz, vcc = 5.5 600 600 600 600 ma standby current i sb cs = v ih , oe = v ih , f = 5mhz, vcc = 5.5 80 80 80 60 ma output low voltage v ol i ol = 8ma, v cc = 4.5 0.4 0.4 0.4 0.4 v output high voltage v oh i oh = -4.0ma, v cc = 4.5 2.4 2.4 2.4 2.4 v parameter sym conditions -35 -45 -55 units min max min max min max input leakage current i li v cc = 5.5, v in = gnd to v cc 10 10 10 m a output leakage current i lo cs = v ih , oe = v ih , v out = gnd to v cc 10 10 10 m a operating supply current i cc cs = v il , oe = v ih , f = 5mhz, vcc = 5.5 600 600 600 ma standby current i sb cs = v ih , oe = v ih , f = 5mhz, vcc = 5.5 60 60 60 ma output low voltage v ol i ol = 2.1ma, v cc = 4.5 0.4 0.4 0.4 v output high voltage v oh i oh = -1.0ma, v cc = 4.5 2.4 2.4 2.4 v note: dc test conditions: v ih = v cc -0.3v, v il = 0.3v characteristic sym conditions min typ max units data retention voltage v cc v cc = 2.0v 2 - - v data retention quiescent current i ccdr cs 3 v cc -0.2v - 1 4 ma chip disable to data retention time (1) t cdr v in 3 v cc -0.2v 0 - - ns operation recovery time (1) t r or v in 0.2v t rc -ns note: parameter guaranteed, but not tested. *low power data retention available only in g2t/e package type. data retention characteristics* (t a = -55 c to +125 c), (t a = -40 c to +85 c) ws128k32-xxx / EDI8C32128C
4 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com fig. 4 ac test circuit notes: v z is programmable from -2v to +7v. i ol & i oh programmable from 0 to 16ma. tester impedance z 0 = 75 w . v z is typically the midpoint of v oh and v ol . i ol & i oh are adjusted to simulate a typical resistive load circuit. ate tester includes jig capacitance. i current source d.u.t. c = 50 pf eff i ol v 1.5v (bipolar supply) z current source oh ac test conditions parameter typ unit input pulse levels v il = 0, v ih = 3.0 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v ac characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) parameter symbol -15 -17 -20 -25 -35 -45 -55 units read cycle min max min max min max min max min max min max min max read cycle time t rc 15 17 20 25 35 45 55 ns address access time t aa 15 17 20 25 35 45 55 ns output hold from address change t oh 000 0 0 0 0ns chip select access time t acs 15 17 20 25 35 45 55 ns output enable to output valid t oe 10 10 12 15 20 25 30 ns chip select to output in low z t clz 1 333 3 3 3 3ns output enable to output in low z t olz 1 000 0 0 0 0ns chip disable to output in high z t chz 1 12 12 12 12 20 20 20 ns output disable to output in high z t ohz 1 12 12 12 12 20 20 20 ns 1. this parameter is guaranteed by design but not tested. ac characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) parameter symbol -15 -17 -20 -25 -35 -45 -55 units write cycle min max min max min max min max min max min max min max write cycle time t wc 15 17 20 25 35 45 55 ns chip select to end of write t cw 14 14 15 20 25 30 45 ns address valid to end of write t aw 14 15 15 20 25 30 45 ns data valid to end of write t dw 10 10 12 15 20 25 25 ns write pulse width t wp 14 14 15 20 25 30 45 ns address setup time t as 0000 0 0 0ns address hold time t ah 0000 0 0 0ns output active from end of write t ow 1 3333 4 4 4ns write enable to output in high z t whz 1 10 10 12 15 20 25 25 ns data hold time t dh 0000 0 0 0ns 1. this parameter is guaranteed by design but not tested. ws128k32-xxx / EDI8C32128C ws128k32-xxx / EDI8C32128C
5 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com ws32k32-xhx fig. 5 timing waveform - read cycle fig. 7 write cycle - cs controlled fig. 6 write cycle - we controlled address data i/o write cycle 1, we controlled t aw t cw t ah t wp t dw t whz t as t ow t dh t wc data valid cs we address data i/o write cycle 2, cs controlled t aw t as t cw t ah t wp t dh t dw t wc cs we data valid address data i/o read cycle 2 (we = v ih ) t aa t acs t oe t clz t olz t ohz t rc data valid high impedance cs oe t chz address data i/o read cycle 1 (cs = oe = v il , we = v ih ) t aa t oh t rc data valid previous data valid ws128k32-xxx / EDI8C32128C
6 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com package 400: 66 pin, pga type, ceramic hex-in-line package, hip (h1/g) 27.3 (1.075) 0.25 (0.010) sq pin 1 identifier square pad on bottom 25.4 (1.0) typ 15.24 (0.600) typ 0.76 (0.030) 0.13 (0.005) 4.34 (0.171) max 3.81 (0.150) 0.13 (0.005) 2.54 (0.100) typ 25.4 (1.0) typ 1.42 (0.056) 0.13 (0.005) 1.27 (0.050) typ dia 0.46 (0.018) 0.05 (0.002) dia all linear dimensions are millimeters and parenthetically in inches all linear dimensions are millimeters and parenthetically in inches package 502: 68 lead, ceramic quad flat pack, low profile cqfp (g4t) 38 (1.50) typ 4 places 0.38 (0.015) 0.08 (0.003) 68 places 1.27 (0.050) typ 5.1 (0.200) 0.25 (0.010) 4 places 12.7 (0.500) 0.5 (0.020) 4 places 0.25 (0.010) 0.05 (0.002) pin 1 identifier pin 1 39.6 (1.56) 0.38 (0.015) sq 3.56 (0.140) max ws128k32-xxx / EDI8C32128C
7 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com package 509: 68 lead, low profile ceramic quad flat pack, cqfp (g2t/e) 0.38 (0.015) 0.05 (0.002) 0.27 (0.011) 0.04 (0.002) 25.15 (0.990) 0.26 (0.010) sq 1.27 (0.050) typ 24.03 (0.946) 0.26 (0.010) 22.36 (0.880) 0.26 (0.010) sq 20.3 (0.800) ref 4.57 (0.180) max 0.19 (0.007) 0.06 (0.002) 23.87 (0.940) ref 1.0 (0.040) 0.127 (0.005) 0.25 (0.010) ref 1 / 7 r 0.25 (0.010) detail a see detail "a" pin 1 all linear dimensions are millimeters and parenthetically in inches 0.940" typ the white 68 lead g2t cqfp fills the same fit and function as the jedec 68 lead cqfj or 68 plcc. but the g2t has the tce and lead inspection advantage of the cqfp form. ws128k32-xxx / EDI8C32128C
8 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com ordering information lead finish: blank = gold plated leads a = solder dip leads device grade: q = mil-std-883 compliant m = military screened -55 c to +125 c i = industrial -40 c to +85 c c = commercial 0 c to +70 c package type: h1 = 1.075" sq. ceramic hex-in-line package, hip (package 400) g2t = 22.4mm ceramic quad flat pack, low profile cqfp (package 509) g4t = 40 mm low profile cqfp (package 502) access time (ns) improvement mark: n = no connect at pin 8, 21, 28 and 39 in hip for upgrades l = low power * organization, 128kx32 user configurable as 256kx16 or 512kx8 sram white microelectronics w s 128k 32 x - xxx x x x electronic designs sram ceramic mcm organization, 128kx32 technology: c = cmos standard power lp = low power * access time (ns) package type: e = 22.4mm ceramic quad flat pack, low profile cqfp (package 509) g = 1.075" sq. ceramic hex-in-line package, hip (package 400) device grade: b = mil-std-883 compliant m = military screened -55 c to +125 c i = industrial -40 c to +85 c c = commercial 0 c to +70 c edi 8 c 32 128 c x x x * low power data retention only available in g2t/e package type ws128k32-xxx / EDI8C32128C note: for non-smd new designs, please use the ws128k32-xxx part number for inquiries and orders.
9 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com ws128k32-xxx / EDI8C32128C device type speed package smd no. 128k x 32 sram module 55ns 66 pin hip (h1) 5962-93187 05h5x 128k x 32 sram module 45ns 66 pin hip (h1) 5962-93187 06h5x 128k x 32 sram module 35ns 66 pin hip (h1) 5962-93187 07h5x 128k x 32 sram module 25ns 66 pin hip (h1) 5962-93187 08h5x 128k x 32 sram module 20ns 66 pin hip (h1) 5962-93187 09h5x 128k x 32 sram module 17ns 66 pin hip (h1) 5962-93187 10h5x 128k x 32 sram module 15ns 66 pin hip (h1) 5962-93187 11h5x 128k x 32 sram module 55ns 68 lead cqfp low profile (g4t) 5962-95595 05hyx 128k x 32 sram module 45ns 68 lead cqfp low profile (g4t) 5962-95595 06hyx 128k x 32 sram module 35ns 68 lead cqfp low profile (g4t) 5962-95595 07hyx 128k x 32 sram module 25ns 68 lead cqfp low profile (g4t) 5962-95595 08hyx 128k x 32 sram module 20ns 68 lead cqfp low profile (g4t) 5962-95595 09hyx 128k x 32 sram module 17ns 68 lead cqfp low profile (g4t) 5962-95595 10hyx 128k x 32 sram module 15ns 68 lead cqfp low profile (g4t) 5962-95595 11hyx 128k x 32 sram module 55ns 68 lead cqfp/j (g2t) 5962-95595 05hmx 128k x 32 sram module 45ns 68 lead cqfp/j (g2t) 5962-95595 06hmx 128k x 32 sram module 35ns 68 lead cqfp/j (g2t) 5962-95595 07hmx 128k x 32 sram module 25ns 68 lead cqfp/j (g2t) 5962-95595 08hmx 128k x 32 sram module 20ns 68 lead cqfp/j (g2t) 5962-95595 09hmx 128k x 32 sram module 17ns 68 lead cqfp/j (g2t) 5962-95595 10hmx 128k x 32 sram module 15ns 68 lead cqfp/j (g2t) 5962-95595 11hmx
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